1. Field of the Disclosure
The present invention relates generally to photodetectors, and more specifically, the present invention is directed to imaging systems including single photon avalanche diode imaging sensors.
2. Background
Image sensors have become ubiquitous. They are widely used in digital still cameras, cellular phones, security cameras, as well as, medical, automobile, and other applications. The technology used to manufacture image sensors, has continued to advance at great pace. For example, the demands of higher resolution and lower power consumption have encouraged the further miniaturization and integration of these image sensors.
One type of photodetector that may be used in an image sensor or in a light detector is a single photon avalanche diode (SPAD). A SPAD (also referred to as a Geiger-mode avalanche photodiode (GM-APD)) is a solid-state photodetector capable of detecting a low intensity signal, such as low as a single photon. SPAD imaging sensors are semiconductor photosensitive devices made up of an array of SPAD regions that are fabricated on a silicon substrate. The SPAD regions produce an output pulse when struck by a photon. The SPAD regions have a p-n junction that is reverse biased above the breakdown voltage such that a single photo-generated carrier can trigger an avalanche multiplication process that causes current at the output of the photon detection cell to reach its final value quickly. This avalanche current continues until a quenching element is used to quench the avalanche process by reducing the bias voltage. The intensity of the photon signal received by the image sensor is obtained by counting the number of these output pulses within a window of time.
However, it is difficult to optimize a SPAD for excellent detection efficiency, spectral response, and timing resolution when the SPAD is fabricated with a standard complementary metal oxide semiconductor (CMOS) process. For instance, operating SPADs in full depletion is not generally possible in standard CMOS processes because operating SPADs in full depletion may cause the metal oxide semiconductor field effect transistors (MOSFETs) not to function correctly. In addition, having SPADs arranged in the same plane as the MOSFETs of the CMOS circuitry reduces the fill factor. Furthermore, it is also difficult to achieve relatively small pitch photon timing sensors with high fill factor and excellent SPAD performance in any single CMOS process.
Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the present invention. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of the present invention.